Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1470

I2S Registers
22.10.1.30 IRQCLR Register (Offset = 7Ch) [reset = 0h]
IRQCLR is shown in
Interrupt Clear Register
31 30
23 22
15 14
7 6
RESERVED
W-0h
Bit Field
31-6 RESERVED
5 AIF_DMA_IN
4 AIF_DMA_OUT
3 WCLK_TIMEOUT
2 BUS_ERR
1 WCLK_ERR
0 PTR_ERR
1470
Integrated Interchip Sound (I2S) Module
Figure 22-38 and described in
Figure 22-38. IRQCLR Register
29 28
RESERVED
21 20
RESERVED
13 12
RESERVED
5 4
AIF_DMA_IN AIF_DMA_OUT
W-0h W-0h
Table 22-31. IRQCLR Register Field Descriptions
Type Reset
W 0h
W 0h
W 0h
W 0h
W 0h
W 0h
W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 22-31.
27 26
W-0h
19 18
W-0h
11 10
W-0h
3 2
WCLK_TIMEO BUS_ERR
UT
W-0h W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
1: Clears the interrupt of IRQFLAGS.AIF_DMA_IN (unless a set
criteria was given at the same time in which the clear will be ignored)
1: Clears the interrupt of IRQFLAGS.AIF_DMA_OUT (unless a set
criteria was given at the same time in which the clear will be ignored)
1: Clears the interrupt of IRQFLAGS.WCLK_TIMEOUT (unless a set
criteria was given at the same time in which the clear will be ignored)
1: Clears the interrupt of IRQFLAGS.BUS_ERR (unless a set criteria
was given at the same time in which the clear will be ignored)
1: Clears the interrupt of IRQFLAGS.WCLK_ERR (unless a set
criteria was given at the same time in which the clear will be ignored)
1: Clears the interrupt of IRQFLAGS.PTR_ERR (unless a set criteria
was given at the same time in which the clear will be ignored)
SWCU117C – February 2015 – Revised September 2015
www.ti.com
25 24
17 16
9 8
1 0
WCLK_ERR PTR_ERR
W-0h W-0h
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