Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1443

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22.10.1.3 AIFDIRCFG Register (Offset = 8h) [reset = 0h]
AIFDIRCFG is shown in
Pin Direction
31 30
23 22
15 14
7 6
RESERVED
R-0h
Bit Field
31-10 RESERVED
9-8 AD2
7-6 RESERVED
5-4 AD1
3-2 RESERVED
1-0 AD0
SWCU117C – February 2015 – Revised September 2015
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Figure 22-11 and described in
Figure 22-11. AIFDIRCFG Register
29 28
RESERVED
R-0h
21 20
RESERVED
R-0h
13 12
RESERVED
R-0h
5 4
AD1
R/W-0h
Table 22-4. AIFDIRCFG Register Field Descriptions
Type Reset
R 0h
R/W 0h
R 0h
R/W 0h
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 22-4.
27 26
19 18
11 10
3 2
RESERVED
R-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Configures the AD2 audio data pin usage
0x3: Reserved
0h = Not in use (disabled)
1h = Input mode
2h = Output mode
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Configures the AD1 audio data pin usage:
0x3: Reserved
0h = Not in use (disabled)
1h = Input mode
2h = Output mode
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Configures the AD0 audio data pin usage:
0x3: Reserved
0h = Not in use (disabled)
1h = Input mode
2h = Output mode
Integrated Interchip Sound (I2S) Module
I2S Registers
25 24
17 16
9 8
AD2
R/W-0h
1 0
AD0
R/W-0h
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