Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1427

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21.5.1.18 MCR Register (Offset = 820h) [reset = 0h]
MCR is shown in Figure 21-31
Master Configuration
This register configures the mode (Master or Slave) and sets the interface for test mode loopback.
31 30
23 22
15 14
7 6
RESERVED
R/W-0h
Bit Field
31-6 RESERVED
5 SFE
4 MFE
3-1 RESERVED
0 LPBK
SWCU117C – February 2015 – Revised September 2015
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and described in Table
Figure 21-31. MCR Register
29 28
RESERVED
R/W-0h
21 20
RESERVED
R/W-0h
13 12
RESERVED
R/W-0h
5 4
SFE MFE
R/W-0h R/W-0h
Table 21-20. MCR Register Field Descriptions
Type Reset
R/W 0h
R/W 0h
R/W 0h
R 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
21-20.
27 26
19 18
11 10
3 2
RESERVED
R-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
I2C slave function enable
0h = Slave mode is disabled.
1h = Slave mode is enabled.
I2C master function enable
0h = Master mode is disabled.
1h = Master mode is enabled.
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
I2C loopback
0: Normal operation
1: Loopback operation (test mode)
0h = Disable Test Mode
1h = Enable Test Mode
Inter-Integrated Circuit (I
2
I C Registers
25 24
17 16
9 8
1 0
LPBK
R/W-0h
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2
C) Interface