Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1383

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20.7.1.1 CR0 Register (Offset = 0h) [reset = 0h]
CR0 is shown in Figure 20-13
Control 0
31 30 29 28
15 14 13 12
Bit Field
31-16 RESERVED
15-8 SCR
7 SPH
6 SPO
5-4 FRF
SWCU117C – February 2015 – Revised September 2015
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and described in
Figure 20-13. CR0 Register
27 26 25
11 10 9
SCR
R/W-0h
Table 20-3. CR0 Register Field Descriptions
Type Reset
R 0h
R/W 0h
R/W 0h
R/W 0h
R/W 0h
Copyright © 2015, Texas Instruments Incorporated
Table 20-3.
24 23 22 21
RESERVED
R-0h
8 7 6 5
SPH SPO FRF
R/W- R/W- R/W-0h
0h 0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Serial clock rate:
This is used to generate the transmit and receive bit rate of the SSI.
The bit rate is
(SSI clock frequency) / ((SCR + 1) * CPSR.CPSDVSR).
SCR is a value from 0-255.
CLKOUT phase (Motorola SPI frame format only)
This bit selects the clock edge that captures data and enables it to
change state. It
has the most impact on the first bit transmitted by either permitting or
not permitting a clock transition before the first data capture edge.
0h = 1ST_CLK_EDGE : Data is captured on the first clock edge
transition.
1h = 2ND_CLK_EDGE : Data is captured on the second clock edge
transition.
CLKOUT polarity (Motorola SPI frame format only)
0h = SSI produces a steady state LOW value on the
CLKOUT pin when data is not being transferred.
1h = SSI produces a steady state HIGH value on the CLKOUT pin
when data is not being transferred.
Frame format.
The supported frame formats are Motorola SPI, TI synchronous
serial and National MICROWIRE.
Value 0'b11 is reserved and shall not be used.
0h = Motorola SPI frame format
1h = TI synchronous serial frame format
2h = National MICROWIRE frame format
SSI Registers
20 19 18 17
4 3 2 1
DSS
R/W-0h
Synchronous Serial Interface (SSI)
16
0
1383