Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1426

2
I C Registers
21.5.1.17 MICR Register (Offset = 81Ch) [reset = 0h]
MICR is shown in
Master Interrupt Clear
This register clears the raw and masked interrupt.
31 30 29 28
15 14 13 12
Bit Field
31-1 RESERVED
0 IC
1426
Inter-Integrated Circuit (I
Figure 21-30 and described in
Figure 21-30. MICR Register
27 26 25
11 10 9
RESERVED
Table 21-19. MICR Register Field Descriptions
Type Reset
W 0h
W 0h
2
C) Interface
Copyright © 2015, Texas Instruments Incorporated
Table 21-19.
24 23 22 21
RESERVED
W-0h
8 7 6 5
W-0h
Description
Software must not rely on the value of a reserved. Writing any other
value than the reset value may result in undefined behavior.
Interrupt clear
Writing 1 to this bit clears MRIS.RIS and MMIS.MIS.
Reading this register returns no meaningful data.
SWCU117C – February 2015 – Revised September 2015
www.ti.com
20 19 18 17
4 3 2 1
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16
0
IC
W-0h