Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1072

µDMA Registers
12.5.1.16 CLEARCHNLPRIORITY Register (Offset = 3Ch) [reset = 0h]
CLEARCHNLPRIORITY is shown in
Clear Channel Priority
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 CHNLS
1072
Micro Direct Memory Access (µDMA)
Figure 12-22
Figure 12-22. CLEARCHNLPRIORITY Register
Table 12-23. CLEARCHNLPRIORITY Register Field Descriptions
Type Reset
W 0h
Copyright © 2015, Texas Instruments Incorporated
and described in Table
CHNLS
W-0h
Description
Clear the appropriate bit to select the default priority level for the
specified uDMA channel.
Write as:
Bit [Ch] = 0: No effect. Use the SETCHNLPRIORITY.CHNLS to set
channel Ch to the high priority level.
Bit [Ch] = 1: Channel Ch uses the default priority level.
Writing to a bit where a uDMA channel is not implemented has no
effect
SWCU117C – February 2015 – Revised September 2015
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12-23.
9 8 7 6 5 4 3 2
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