Texas Instruments SimpleLink CC2620 Technical Reference Manual page 854

Cryptography Registers
10.2.1.23 AESDATAOUT0 Register (Offset = 560h) [reset = 0h]
AESDATAOUT0 is shown in
Data Input/Output
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bit Field
31-0 DATA
854
Figure 10-25 and described in
Figure 10-25. AESDATAOUT0 Register
DATA
R-0h
Table 10-33. AESDATAOUT0 Register Field Descriptions
Type Reset
R 0h
Copyright © 2015, Texas Instruments Incorporated
Table 10-33.
9
Description
Data register 0 for output block data from the Crypto peripheral.
These bits = AES Output Data[31:0] of [127:0]
For normal operations, this register is not used, since data input and
output is transferred from and to the AES engine through DMA.
For a Host read operation, these registers contain the 128-bit output
block from the latest AES operation. Reading from a word-aligned
offset within this address range will read one word (4 bytes) of data
out the 4-word deep (16 bytes = 128-bits AES block) data output
buffer. The words (4 words, one full block) must be read before the
core will move the next block to the data output buffer. To empty the
data output buffer, AESCTL.OUTPUT_RDY must be written.
For the modes with authentication (CBC-MAC, GCM and CCM), the
invalid (message) bytes/words can be written with any data.
Note: The AAD / authentication only data is not copied to the output
buffer but only used for authentication.
SWCU117C – February 2015 – Revised September 2015
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