Texas Instruments SimpleLink CC2620 Technical Reference Manual page 1202

Modules
17.4.1.5.8 Miscellaneous Instructions
A few instructions fall outside of the previously described instruction groups. These instructions are shown
in Table 17-13 and described in this section.
Syntax Description
ld Rd,#simm Load immediate
ld Rd,Rs Load register
pfix #imm Prefix immediate
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Flags: Zero (Z), Negative (N), Carry (C), and Overflow (V)
The load immediate instruction embeds a 10-bit signed immediate in the instruction word, allowing an
immediate in the range –512 to +511 to be loaded directly into a register.
The load register instruction copies a source register to a destination register. The nop instruction is
encoded as ld R7,R7.
The prefix instruction embeds an 8-bit, unsigned immediate in the instruction word that is loaded into a
hidden prefix register. Upon execution of the next instruction with an immediate or direct address operand,
the prefix register is effectively providing bit 15–8 of the source operand. Once used, the prefix register is
disabled and not used again until following the execution of a new prefix instruction.
Using prefixed instructions have the following two implications:
• The two uppermost bits, 9 and 8, of a 10-bit immediate or direct address embedded in an instruction
are ignored, as they are replaced by bits from the prefix register.
• No sign extension of an embedded immediate is performed for instructions that would normally do so,
as the uppermost bits are provided by the prefix register.
17.4.1.5.9 Reset
Following reset, execution starts at an address corresponding to the value of the same vector input as
used for the sleep instruction. This execution enables a usage model where the sensor controller is
completely disabled (powered down), and once activated, execution starts directly at an address of a
dedicated handler corresponding to the source that caused the sensor controller to be activated as
described in Section
Restart functionality is also provided by asserting AUX_SCE:CTL.RESTART, which immediately disrupts
the instruction flow, causing execution to resume at the handler address selected by the vector input.
The restart functionality does not clear internal registers and flags. Reset does disable an active loop or
prefix.
17.4.1.5.10 Limitations
Due to internal pipelining and minimized register bypass logic, the instructions using R0 as a dedicated
register require special caution.
R0 must not be loaded from memory or register by an instruction immediately preceding any instruction
using R0 as a dedicated register. The affected instructions are ld/st rd,(Rs+R0) and jmp/jsr (R0).
Not observing this rule causes the previous value of R0 to be used instead of the newly loaded one.
Loading an immediate or the result of any nonmemory I/O operation into R0 is perfectly valid and causes
the expected behavior.
1202
AUX – Sensor Controller with Digital and Analog Peripherals
Table 17-13. Miscellaneous Instructions
Operation
Rd = simm
Rd = rs
pfix = imm
17.4.1.5.7.
Copyright © 2015, Texas Instruments Incorporated
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SWCU117C – February 2015 – Revised September 2015
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