Application Information; Impact Of Using The Prescaler And Multiplication Factor On Timing Resolution - NXP Semiconductors freescale KV4 Series Reference Manual

CHnDLY1
CHnDLY0
PDB counter
SC[LDOK]
Ch n pre-trigger 0
Ch n pre-trigger 1
Figure 38-83. Registers update with SC[LDMOD] = x1
38.5.6 Interrupts
PDB can generate two interrupts: PDB interrupt and PDB sequence error interrupt. The
following table summarizes the interrupts.
Interrupt
PDB Interrupt
PDB Sequence Error Interrupt
38.5.7 DMA
If SC[DMAEN] is set, PDB can generate a DMA transfer request when SC[PDBIF] is
set. When DMA is enabled, the PDB interrupt is not issued.

38.6 Application information

38.6.1 Impact of using the prescaler and multiplication factor on
timing resolution
Use of prescaler and multiplication factor greater than 1 limits the count/delay accuracy
in terms of peripheral clock cycles (to the modulus of the prescaler X multiplication
factor). If the multiplication factor is set to 1 and the prescaler is set to 2 then the only
Freescale Semiconductor, Inc.
Table 38-89. PDB interrupt summary
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 38 Programmable Delay Block (PDB)
Flags
SC[PDBIF] SC[PDBIE] = 1 and
CHnS[ERRm]
Enable bit
SC[DMAEN] = 0
SC[PDBEIE] = 1
887