Initialization/Application Information; Flexcan Initialization Sequence - NXP Semiconductors freescale KV4 Series Reference Manual

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• Unrestricted read and write access to supervisor registers (registers identified with
S/U in Table "Module Memory Map" in Supervisor Mode or with S only) results in
access error.
• Read and write access to implemented reserved address space results in access error.
• Write access to positions whose bits are all currently read-only results in access error.
If at least one of the bits is not read-only then no access error is issued. Write
permission to positions or some of their bits can change depending on the mode of
operation or transitory state. Refer to register and bit descriptions for details.
• Read and write access to unimplemented address space results in access error.
• Read and write access to RAM located positions during Low Power Mode results in
access error.
• If MAXMB in CAN MCR register is programmed with a value smaller than the
available number of MBs, then the unused memory space can be used as general
purpose RAM space. Note that reserved words within RAM cannot be used. As an
example, suppose FlexCAN's RAM can support up to 16 MBs,
CAN_CTRL2[RFFN] is 0x0, and CAN_MCR[MAXMB] is programmed with zero.
The maximum number of MBs in this case becomes one. The RAM starts at 0x0080,
and the space from 0x0080 to 0x008F is used by the one MB. The memory space
from 0x0090 to 0x017F is available. The space between 0x0180 and 0x087F is
reserved. The space from 0x0880 to 0x0883 is used by the one Individual Mask and
the available memory in the Mask Registers space would be from 0x0884 to 0x08BF.
From 0x08C0 through 0x09DF there are reserved words for internal use which
cannot be used as general purpose RAM. As a general rule, free memory space for
general purpose depends only on MAXMB.

43.6 Initialization/application information

This section provide instructions for initializing the FlexCAN module.

43.6.1 FlexCAN initialization sequence

The FlexCAN module may be reset in three ways:
• MCU level hard reset, which resets all memory mapped registers asynchronously
Freescale Semiconductor, Inc.
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 43 Flex Controller Area Network (FlexCAN)
1165

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