Wait Mode Operation - NXP Semiconductors freescale KV4 Series Reference Manual

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Functional description
35.4.1.7 Windowed/Filtered mode (#7)
This is the most complex mode of operation for the comparator block, as it uses both
windowing and filtering features. It also has the highest latency of any of the modes. This
can be approximated: up to 1 bus clock synchronization in the window function +
((CR0[FILTER_CNT] * FPR[FILT_PER]) + 1) * bus clock for the filter function.
When any windowed mode is active, COUTA is clocked by the bus clock whenever
WINDOW = 1. The last latched value is held when WINDOW = 0.
EN, PMODE,HYSCTR[1:0]
INP
INM
bus clock
FILT_PER
35.4.2 Power modes

35.4.2.1 Wait mode operation

During Wait and VLPW modes, the CMP, if enabled, continues to operate normally and
a CMP interrupt can wake the MCU.
746
Internal bus
FILT_PER
COS
INV
+
Polarity
-
select
CMPO
WINDOW/SAMPLE
Clock
divided
prescaler
bus
clock
Figure 35-41. Windowed/Filtered mode
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
OPE
FILTER_CNT
WE
COUT
SE
1
>
0x01
0
Window
Filter
control
block
1
0
COUTA
CGMUX
SE=0
Freescale Semiconductor, Inc.
IER/F
CFR/F
Interrupt
control
IRQ
COUT
To other SOC functions
0
CMPO to
1
PAD
COS

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