Continuous Serial Communications Clock - NXP Semiconductors freescale KV4 Series Reference Manual

• When transmitting multiple frames in this mode, the user software must ensure that
the last frame has the PUSHR[CONT] bit deasserted in Master mode and the user
software must provide sufficient frames in the TX_FIFO to be sent out in Slave mode
and the master deasserts the PCSn at end of transmission of the last frame.
• PUSHR[CONT] must be deasserted before asserting MCR[HALT] in master mode.
This will make sure that the PCSn signals are deasserted. Asserting MCR[HALT]
during continuous transfer will cause the PCSn signals to remain asserted and hence
Slave Device cannot transition from Running to Stopped state.
User must fill the TX FIFO with the number of entries that will
be concatenated together under one PCS assertion for both
master and slave before the TX FIFO becomes empty.
When operating in Slave mode, ensure that when the last entry
in the TX FIFO is completely transmitted, that is, the
corresponding TCF flag is asserted and TXFIFO is empty, the
slave is deselected for any further serial communication;
otherwise, an underflow error occurs.

44.5.5 Continuous Serial Communications Clock

The module provides the option of generating a Continuous SCK signal for slave
peripherals that require a continuous clock.
Continuous SCK is enabled by setting the CONT_SCKE bit in the MCR. Enabling this
bit generates the Continuous SCK only if MCR[HALT] bit is low. Continuous SCK is
valid in all configurations.
Continuous SCK is only supported for CPHA=1. Clearing CPHA is ignored if the
CONT_SCKE bit is set. Continuous SCK is supported for Modified Transfer Format.
Clock and transfer attributes for the Continuous SCK mode are set according to the
following rules:
• When the module is in SPI configuration, CTAR0 is used initially. At the start of
each SPI frame transfer, the CTAR specified by the CTAS for the frame is used.
• In all configurations, the currently selected CTAR remains in use until the start of a
frame with a different CTAR specified, or the Continuous SCK mode is terminated.
Freescale Semiconductor, Inc.
NOTE
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 44 Serial Peripheral Interface (SPI)
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