Asymmetrical Pwm; Complementary Mode - NXP Semiconductors freescale KV4 Series Reference Manual

Functional description
channel (n) output
with ELSnB:ELSnA = 1:0
channel (n) output
with ELSnB:ELSnA = X:1
Figure 39-203. Channel (n) output if (C(n+1)V > MOD) and (CNTIN < C(n)V < MOD)
MOD = C(n)V
channel (n) output
with ELSnB:ELSnA = 1:0
channel (n) output
with ELSnB:ELSnA = X:1
Figure 39-204. Channel (n) output if (C(n+1)V > MOD) and (CNTIN < C(n)V = MOD)

39.5.8.1 Asymmetrical PWM

In Combine mode, the control of the PWM signal first edge, when the channel (n) match
occurs, that is, FTM counter = C(n)V, is independent of the control of the PWM signal
second edge, when the channel (n+1) match occurs, that is, FTM counter = C(n+1)V. So,
Combine mode allows the generation of asymmetrical PWM signals.

39.5.9 Complementary mode

The Complementary mode is selected when:
970
C(n+1)V
MOD
C(n)V
CNTIN
C(n+1)V
CNTIN
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
FTM counter
FTM counter
not fully 0% duty cycle
not fully 100% duty cycle
Freescale Semiconductor, Inc.