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Functional Description
34.4.26 ADC Scan Interrupt Enable Register (ADC_SCHLTEN)
This register is used with ready register (RDY) to select the samples that will generate a
scan interrupt.
Address: 4005_C000h base + AAh offset = 4005_C0AAh
Bit
15
14
13
Read
Write
Reset
0
0
0
Field
SCHLTEN[15:0] Scan Interrupt Enable
0
Scan interrupt is not enabled for this sample.
1
Scan interrupt is enabled for this sample.
34.5 Functional Description
The ADC consists of two eight-channel input select functions, which are two independent
sample and hold (S/H) circuits feeding two separate 12-bit ADCs. The two separate
converters store their results in an accessible buffer, awaiting further processing.
The conversion process is initiated either by a SYNC signal or by writing a 1 to a START
bit.
Starting a single conversion actually begins a sequence of conversions, or a scan. The
ADC operates in either sequential scan mode or parallel scan mode. In sequential scan
mode, scan sequence is determined by defining sixteen sample slots that are processed in
order, SAMPLE[0:15]. In parallel scan mode, converter A processes SAMPLE[0:7] in
order, and converter B processes SAMPLE[8:15] in order. SAMPLE slots can be
disabled using the ADC_SDIS control register to terminate a scan early.
In sequential scan mode, a scan takes up to sixteen single-ended or differential samples,
one at a time. See the following figure.
704
12
11
10
9
SCHLTEN[15:0]
0
0
0
0
ADC_SCHLTEN field descriptions
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
8
7
6
5
0
0
0
0
Description
4
3
2
1
0
0
0
0
Freescale Semiconductor, Inc.
0
0
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