Ftm Hardware Triggers; Input Capture Options For Ftm Module Instances; Ftm Output Triggers For Other Modules - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

39.1.6 FTM Hardware Triggers

The FTM input synchronization hardware triggers are connected in the chip as follows:

• FTM0 hardware trigger 0 = FTM0_SYNCBIT of SIM_OPTx register, CMP0 Output

or FTM1 Match output.

• FTM0 hardware trigger 1 = PDB0 channel 1 trigger Output or FTM1 Match output

• FTM0 hardware trigger 2 = XBARA_OUT34

• FTM1 hardware trigger 0 = FTM1_SYNCBIT of SIM_OPTx register, CMP0 Output

or FTM0 Match output

• FTM1 hardware trigger 1 = CMP1 Output

• FTM1 hardware trigger 2 = XBARA_OUT35

• FTM3 hardware trigger 0 = FTM3_SYNCBIT of SIM_OPTx register, CMP0 Output

or FTM1 Match output

• FTM3 hardware trigger 1 = PDB1 channel 1 Trigger Output or FTM1 Match output

• FTM3 hardware trigger 2 = XBARA_OUT37

The following channel 0 input capture source options are selected via SIM_SOPTx. The

external pin option is selected by default.

• FTM1 channel 0 input capture = FTM1_CH0 pin or CMP0 output or CMP1 output

via FTM1CH0SRC bit in SIM_OPTx regsiter

• FTM1 channel 1 input capture = FTM1_CH1 pin or exclusive OR of FTM1_CH0,

FTM1_CH1, and XBARA_OUT42 via FTM1CH1SRC bit in SIM_SOPT9 register.

The FTM output triggers can be selected as input triggers for the PDB and ADC modules.

FTM0 has 8 channels of trigger capability which are ORed together to force an output

trigger. This EXTTRG0 signal is connected to PDB0 channel 1000 input, PDB1 channel

1000 input, XBARA_IN16 and XBARB_IN4.

Individual FTM0 channels trigger signal outputs are also assigned to the DMAMUX

FTM0_CH0 event output to DMAMUX source 24

FTM0_CH1 event output to DMAMUX source 25

Freescale Semiconductor, Inc.

KV4x Reference Manual, Rev. 2, 02/2015

Chapter 39 FlexTimer Module (FTM)