Data Format; Eight-Bit Configuration - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

46.5.4 Data format

Each data character is contained in a frame that includes a start bit and a stop bit. The rest

of the data format depends upon C1[M], C1[PE], S2[MSBF], BDH[SBNS] and C4[M10].

Clearing C1[M] configures the UART for 8-bit data characters, that is, eight bits are

memory mapped in D. A frame with eight data bits has a total of 10 bits (This becomes

11 bits if BDH[SBNS] = 1). The most significant bit of the eight data bits can be used as

an address mark to wake the receiver. If the most significant bit is used in this way, then

it serves as an address or data indication, leaving the remaining seven bits as actual data.

When C1[PE] is set, the eighth data bit is automatically calculated as the parity bit. See

the following table.

1. The address bit identifies the frame as an address character. See

2. The address bit identifies the frame as an address character. See

In the last column of the above table, the number of stop bits

become 2 when BDH[SBNS] is set.

Freescale Semiconductor, Inc.

Chapter 46 Universal Asynchronous Receiver/Transmitter (UART) / FlexSCI

Table 46-76. Baud rate fine adjust (continued)

Table 46-77. Configuration of 8-bit data format

KV4x Reference Manual, Rev. 2, 02/2015

Baud Rate Fractional Divisor (BRFD)

23/32 = 0.71875

24/32 = 0.75

25/32 = 0.78125

26/32 = 0.8125

27/32 = 0.84375

28/32 = 0.875

29/32 = 0.90625

30/32 = 0.9375

31/32 = 0.96875