Lptmr Power And Reset; Lptmr Prescaler/Glitch Filter - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

Functional description

42.5 Functional description

42.5.1 LPTMR power and reset

The LPTMR remains powered in all power modes, including low-leakage modes. If the

LPTMR is not required to remain operating during a low-power mode, then it must be

disabled before entering the mode.

The LPTMR is reset only on global Power On Reset (POR) or Low Voltage Detect

(LVD). When configuring the LPTMR registers, the CSR must be initially written with

the timer disabled, before configuring the PSR and CMR. Then, CSR[TIE] must be set as

the last step in the initialization. This ensures the LPTMR is configured correctly and the

LPTMR counter is reset to zero following a warm reset.

42.5.2 LPTMR clocking

The LPTMR prescaler/glitch filter can be clocked by one of the four clocks. The clock

source must be enabled before the LPTMR is enabled.

The clock source selected need to be configured to remain

enabled in low-power modes, otherwise the LPTMR will not

operate during low-power modes.

In Pulse Counter mode with the prescaler/glitch filter bypassed, the selected input source

directly clocks the CNR and no other clock source is required. To minimize power in this

case, configure the prescaler clock source for a clock that is not toggling.

The clock source or pulse input source selected for the LPTMR

should not exceed the frequency f

The LPTMR prescaler and glitch filter share the same logic which operates as a prescaler

in Time Counter mode and as a glitch filter in Pulse Counter mode.

KV4x Reference Manual, Rev. 2, 02/2015

defined in the device

Freescale Semiconductor, Inc.