Force Out Logic - NXP Semiconductors freescale KV4 Series Reference Manual

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37.5.2.6 Force Out Logic

For each submodule, software can select between eight signal sources for the
FORCE_OUT signal: local CTRL2[FORCE], the Master Force signal from submodule0,
the local Reload signal, the Master Reload signal from submodule0, the Local Sync
signal, the Master Sync signal from submodule0, the EXT_SYNC signal from on- or off-
chip, or the EXT_FORCE signal from on- or off-chip depending on the chip architecture.
The local signals are used when the user simply wants to change the signals on the output
pins of the submodule without regard for synchronization with other submodules.
However, if it is required that all signals on all submodule outputs change at the same
time, the Master, EXT_SYNC, or EXT_FORCE signals should be selected.
Figure 37-238
illustrates the Force logic. The SEL23 and SEL45 fields each choose from
one of four signals that can be supplied to the submodule outputs: the PWM signal, the
inverted PWM signal, a binary level specified by software via the OUT23 and OUT45
bits, or the PWM_EXTA or PWM_EXTB alternate external control signals. The
selection can be determined ahead of time and, when a FORCE_OUT event occurs, these
values are presented to the signal selection mux that immediately switches the requested
signal to the output of the mux for further processing downstream.
FORCE
Master Force
Local Reload
Master Reload
Local Sync
Master Sync
EXT_FORCE
EXT_SYNC
FORCE_SEL
Freescale Semiconductor, Inc.
from generation h/w
PWM_EXTA
0
SEL23
1
Q
D
2
3
from generation h/w
FORCE_OUT
4
5
6
7
PWM_EXTB
SEL45
Q
D
Figure 37-238. Force Out Logic
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 37 Pulse Width Modulator A (PWMA/eFlexPWM)
PWM23
0
1
OUT23
2
3
PWM45
0
1
2
OUT45
3
Master Force
(from submod0
only)
PWM23
to Deadtime
logic
DBLPWM
PWM45
841

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