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Rx pin input
1
1
SAMPLES
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
46.5.2.5 Framing errors
If the data recovery logic does not detect a logic 1 where the stop bit should be in an
incoming frame, it sets the framing error flag, S1[FE], if S2[LBKDE] is disabled. When
S2[LBKDE] is disabled, a break character also sets the S1[FE] because a break character
has no stop bit. S1[FE] is set at the same time that received data is placed in the receive
data buffer.
46.5.2.6 Receiving break characters
The UART recognizes a break character when a start bit is followed by eight, nine, or ten
logic 0 data bits and a logic 0 where the stop bit should be. Receiving a break character
has these effects on UART registers:
• Sets the framing error flag, S1[FE].
• Writes an all 0 dataword to the data buffer, which may cause S1[RDRF] to set,
depending on the watermark and number of values in the data buffer.
• May set the overrun flag, S1[OR], noise flag, S1[NF], parity error flag, S1[PE], or
the receiver active flag, S2[RAF].
Freescale Semiconductor, Inc.
Chapter 46 Universal Asynchronous Receiver/Transmitter (UART) / FlexSCI
1
1
1
1
1
1
1
0
Figure 46-73. Start bit search example 6
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
START BIT
0
0
0
0
1
1
LSB
1307
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