Ftm Counter Reset In Input Capture Mode - NXP Semiconductors freescale KV4 Series Reference Manual

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Chapter 39 FlexTimer Module (FTM)
If the opposite edge appears on the input signal before it can be validated, the counter is
reset. At the next input transition, the counter starts counting again. Any pulse that is
shorter than the minimum value selected by CHnFVAL[3:0] (× 4 system clocks) is
regarded as a glitch and is not passed on to the edge detector. A timing diagram of the
input filter is shown in the following figure.
The filter function is disabled when CHnFVAL[3:0] bits are zero. In this case, the input
signal is delayed 3 rising edges of the system clock. If (CHnFVAL[3:0] ≠ 0000), then the
input signal is delayed by the minimum pulse width (CHnFVAL[3:0] × 4 system clocks)
plus a further 4 rising edges of the system clock: two rising edges to the synchronizer,
one rising edge to the filter output, plus one more to the edge detector. In other words,
CHnF is set (4 + 4 × CHnFVAL[3:0]) system clock periods after a valid edge occurs on
the channel input.
The clock for the counter in the channel input filter is the system clock divided by 4.
system clock divided by 4
channel (n) input
after the synchronizer
counter
CHnFVAL[3:0] = 0010
(binary value)
Time
filter output
Figure 39-178. Channel input filter example

39.5.4.2 FTM Counter Reset in Input Capture Mode

If the channel (n) is in input capture mode and FTMx_CnSC [ICRST = 1], then when the
selected input capture event occurs in the channel (n) input signal, the current value of the
FTM counter is captured into the CnV register, the CHnF bit is set, the channel (n)
interrupt is generated (if CHnIE = 1) and the FTM counter is reset to the CNTIN register
value.
This allows the FTM to measure a period/pulse being applied to FTM_CHn ( counts of
the FTM clock input) without having to implement a subtraction calculation in software
subsequent to the event occurring.
The figure below shows the FTM counter reset when the selected input capture event is
detected in a channel in input capture mode with ICRST = 1.
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Freescale Semiconductor, Inc.
957

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