Modes Of Operation; Stop Mode; Debug Mode; Block Diagram - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

• One output port, EWM_out, when asserted is used to reset or place the external

circuit into safe mode.

• One Input port, EWM_in, allows an external circuit to control the EWM_out signal.

24.2.2 Modes of Operation

This section describes the module's operating modes.

When the EWM is in stop mode, the CPU services to the EWM cannot occur. On entry to

stop mode, the EWM's counter freezes.

There are two possible ways to exit from Stop mode:

• On exit from stop mode through a reset, the EWM remains disabled.

• On exit from stop mode by an interrupt, the EWM is re-enabled, and the counter

continues to be clocked from the same value prior to entry to stop mode.

Note the following if the EWM enters the stop mode during CPU service mechanism: At

the exit from stop mode by an interrupt, refresh mechanism state machine starts from the

previous state which means, if first service command is written correctly and EWM

enters the stop mode immediately, the next command has to be written within the next 15

(EWM_service_time) peripheral bus clocks after exiting from stop mode. User must mask

all interrupts prior to executing EWM service instructions.

Entry to debug mode has no effect on the EWM.

• If the EWM is enabled prior to entry of debug mode, it remains enabled.

• If the EWM is disabled prior to entry of debug mode, it remains disabled.

This figure shows the EWM block diagram.

Freescale Semiconductor, Inc.

KV4x Reference Manual, Rev. 2, 02/2015

Chapter 24 External Watchdog Monitor (EWM)