Chapter 43 Flex Controller Area Network (Flexcan) - NXP Semiconductors freescale KV4 Series Reference Manual

Chapter 43
Flex Controller Area Network (FlexCAN)
43.1 Chip-specific FlexCAN information
43.1.1 FlexCAN3 glitch filter
This chip supports wakeup from the FlexCAN3 module's Stop and Doze mode through a
CAN wakeup interrupt. Any recessive to dominant transition on the CAN bus
(CAN_RX) can wake the chip from Stop or Doze mode. An optional glitch filter is
connected on CAN_RX to the interrupt generation logic path.
The glitch filter provides the following functionality:
• Filtering out of unwanted noise on the CAN bus
• Selection of the wakeup source, either from the filtered or unfiltered CAN bus
• Routing of the wakeup source to either the synchronous (Doze) or asynchronous
(Stop) wakeup path within the FlexCAN module
The reference clock for the glitch filter is a 4 MHz clock derived from the MCGIRCLK.
The MCGIRCLK must be configured to be 4 MHz and must remain on if the user wants
a low power wakeup through the glitch filter. The glitch filter counts 11 cycles of the 4
MHz clock before recognizing it as a valid recessive to dominant transition.
43.1.2 FlexCAN3 Supervisor Mode
The module's MCR[SUPV] field configures the FlexCAN to be in either Supervisor or
User Mode. On this chip:
• MCR[SUPV] is always 1: the FlexCAN is in Supervisor Mode.
• Writes to MCR[SUPV] have no effect.
Freescale Semiconductor, Inc.
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
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