Chapter 44 Serial Peripheral Interface (Spi) - NXP Semiconductors freescale KV4 Series Reference Manual

Chapter 44
Serial Peripheral Interface (SPI)
44.1 Chip-specific SPI information
44.1.1 SPI Instantiation Information
This chip contains one SPI module. It has 4-byte RX and TX FIFO, as well as DMA
support.
44.1.2 SPI signals
Signal
Receive complete Output
Transmit complete Output
44.1.3 SPI clocking
The SPI module is clocked by the fast peripheral clock (the SPI refers to it as system
clock). The module has an internal divider, with a minimum divide is two. So, the SPI
can run at a maximum frequency of fast peripheral clock/2.
44.1.4 Number of CTARs
SPI CTAR registers define different transfer attribute configurations. The SPI module
supports up to eight CTAR registers. This device supports two CTARs on the instances
of the SPI.
Freescale Semiconductor, Inc.
I/O
DMA_MUX source 16
DMA_MUX source 17
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
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