Scan Sequencing - NXP Semiconductors freescale KV4 Series Reference Manual

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Functional Description
CTRL1[DMAEN0] is set and CTRL3[DMASRC]=0 a DMA transfer of the result data is
initiated. The CTRL1[START0] bit and SYNC0 input are ignored while a scan is in
process. Scanning stops and cannot be initiated when the CTRL1 [STOP0] bit is set.
Parallel scans differ in that converter A performs up to eight samples (SAMPLE[0:7]) in
parallel with converter B (SAMPLE[8:15]). Constraints are as follows:
• SAMPLEs[0:7] can reference only the ANA[0:7] inputs.
• SAMPLEs[8:15] can reference only the ANB[0:7] inputs.
Within these constraints, any sample can reference any pin, and more than one sample
slot can reference the same sample and the same input. All samples have the full
functionality of offset subtraction and high/low limit compare. By default (when
CTRL2[SIMULT]=1), the scans in both converters are initiated when the
CTRL1[START0] bit is written with a 1 or when the CTRL1[SYNC0] bit has a value of
1 and the SYNC0 input goes high. The scan in both converters terminates when either
converter encounters a disabled sample slot. Completion of a scan triggers the
STAT[EOSI0] interrupt if the CTRL1[EOSIEN0] interrupt enable is set. If
CTRL1[DMAEN0] is set and CTRL3[DMASRC]=0 then a DMA transfer of the result
data is initiated. Samples are always taken simultaneously in both the A and B converters.
Setting the CTRL1 [STOP0] bit stops and prevents the initiation of scanning in both
converters.
Setting CTRL2[SIMULT]=0 (non-simultaneous mode) causes parallel scanning to
operate independently in the A and B converter. Each converter has its own set of
START, STOP, SYNC, DMAEN, and EOSIEN control bits, SYNC input, EOSI
interrupt, and CIP status indicators (suffix 0 for converter A and suffix 1 for converter B).
Though still operating in parallel, the scans in the A and B converter start and stop
independently according to their own controls and can be simultaneous, phase shifted, or
asynchronous depending on when scans are initiated on the respective converters. The A
and B converters can be of different length (still up to a maximum of 8) and each
converter's scan completes when a disabled sample is encountered in that converters
sample list only. CTRL1[STOP0] stops the A converter only and CTRL2[STOP1] stops
the B converter only. Looping scan modes iterate independently. Each converter
independently restarts its scan after completing its list or encountering a disabled sample
slot.

34.5.5 Scan Sequencing

The sequential and parallel scan modes fall into three types based on how they repeat:
• Once scan. A once scan executes a sequential or parallel scan only once each time it
is started. It differs from a triggered scan in that sync inputs must be re-armed after
each use.
714
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Freescale Semiconductor, Inc.

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