Jtagc Block Instructions - NXP Semiconductors freescale KV4 Series Reference Manual

48.4.3.2 Selecting an IEEE 1149.1-2001 register
Access to the JTAGC data registers is achieved by loading the instruction register with
any of the JTAGC block instructions while the JTAGC is enabled. Instructions are shifted
in via the Select-IR-Scan path and loaded in the Update-IR state. At this point, all data
register access is performed via the Select-DR-Scan path.
The Select-DR-Scan path is used to read or write the register data by shifting in the data
(LSB first) during the Shift-DR state. When reading a register, the register value is loaded
into the IEEE 1149.1-2001 shifter during the Capture-DR state. When writing a register,
the value is loaded from the IEEE 1149.1-2001 shifter to the register during the Update-
DR state. When reading a register, there is no requirement to shift out the entire register
contents. Shifting may be terminated once the required number of bits have been
acquired.

48.4.4 JTAGC block instructions

The JTAGC block implements the IEEE 1149.1-2001 defined instructions listed in the
following table. This section gives an overview of each instruction; refer to the IEEE
1149.1-2001 standard for more details. All undefined opcodes are reserved.
Instruction
IDCODE
SAMPLE/PRELOAD
SAMPLE
EXTEST
Factory debug reserved
Factory debug reserved
Factory debug reserved
ARM JTAG-DP Reserved
HIGHZ
ARM JTAG-DP Reserved
Freescale Semiconductor, Inc.
Table 48-3. 4-bit JTAG instructions
Code[3:0] Instruction summary
0000 Selects device identification register for shift
0010 Selects boundary scan register for shifting, sampling, and
preloading without disturbing functional operation
0011 Selects boundary scan register for shifting and sampling
without disturbing functional operation
0100 Selects boundary scan register and applies preloaded values
to output pins.
NOTE: Execution of this instruction asserts functional reset.
0101 Intended for factory debug only
0110 Intended for factory debug only
0111 Intended for factory debug only
1000 This instruction goes the ARM JTAG-DP controller. See the
ARM JTAG-DP documentation for more information.
1001 Selects bypass register and three-states all output pins.
NOTE: Execution of this instruction asserts functional reset.
1010 This instruction goes the ARM JTAG-DP controller. See the
ARM JTAG-DP documentation for more information.
Table continues on the next page...
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 48 JTAG Controller (JTAGC)
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