Cmp Features; 6-Bit Dac Key Features - NXP Semiconductors freescale KV4 Series Reference Manual

Table of Contents

Introduction

35.2.1 CMP features

The CMP has the following features:

• Operational over the entire supply range

• Inputs may range from rail to rail

• Programmable hysteresis control

• Selectable interrupt on rising-edge, falling-edge, or both rising or falling edges of the

comparator output

• Selectable inversion on comparator output

• Capability to produce a wide range of outputs such as:

• Windowed, which is ideal for certain PWM zero-crossing-detection applications

• Digitally filtered:

• Filter can be bypassed

• Can be clocked via external SAMPLE signal or scaled bus clock

• External hysteresis can be used at the same time that the output filter is used for

internal functions

• Two software selectable performance levels:

• Shorter propagation delay at the expense of higher power

• Low power, with longer propagation delay

• DMA transfer support

• A comparison event can be selected to trigger a DMA transfer

• Functional in all modes of operation except VLLS0

• The window and filter functions are not available in the following modes:

The 6-bit DAC has the following features:

• 6-bit resolution

• Selectable supply reference source

KV4x Reference Manual, Rev. 2, 02/2015

Freescale Semiconductor, Inc.