I2C Address Register 1 (I2C_A1) - NXP Semiconductors freescale KV4 Series Reference Manual

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Memory map/register definition
45.4 Memory map/register definition
This section describes in detail all I2C registers accessible to the end user.
Absolute
address
(hex)
4006_6000

I2C Address Register 1 (I2C_A1)

4006_6001
I2C Frequency Divider register (I2C_F)
4006_6002
I2C Control Register 1 (I2C_C1)
4006_6003
I2C Status register (I2C_S)
4006_6004
I2C Data I/O register (I2C_D)
4006_6005
I2C Control Register 2 (I2C_C2)
4006_6006
I2C Programmable Input Glitch Filter Register (I2C_FLT)
4006_6007
I2C Range Address register (I2C_RA)
4006_6008
I2C SMBus Control and Status register (I2C_SMB)
4006_6009
I2C Address Register 2 (I2C_A2)
4006_600A
I2C SCL Low Timeout Register High (I2C_SLTH)
4006_600B
I2C SCL Low Timeout Register Low (I2C_SLTL)
45.4.1 I2C Address Register 1 (I2C_A1)
This register contains the slave address to be used by the I2C module.
Address: 4006_6000h base + 0h offset = 4006_6000h
Bit
7
Read
Write
Reset
0
Field
7–1
Address
AD[7:1]
Contains the primary slave address used by the I2C module when it is addressed as a slave. This field is
used in the 7-bit address scheme and the lower seven bits in the 10-bit address scheme.
0
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
1234
I2C memory map
Register name
6
5
4
AD[7:1]
0
0
0
I2C_A1 field descriptions
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Width
Access
(in bits)
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
3
2
0
0
Description
Section/
Reset value
page
00h
45.4.1/1234
00h
45.4.2/1235
00h
45.4.3/1236
80h
45.4.4/1237
00h
45.4.5/1239
00h
45.4.6/1240
00h
45.4.7/1241
00h
45.4.8/1242
00h
45.4.9/1243
45.4.10/
C2h
1245
45.4.11/
00h
1245
45.4.12/
00h
1245
1
0
0
0
0
Freescale Semiconductor, Inc.

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