Period Measurement - NXP Semiconductors freescale KV4 Series Reference Manual

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Functional description
is set when the second edge of this pulse is detected, that is, the edge selected by ELS(n
+1)B:ELS(n+1)A bits. The CH(n+1)F bit indicates when two edges of the pulse were
captured and the C(n)V and C(n+1)V registers are ready for reading.
FTM counter
channel (n) input
(after the filter
channel input)
DECAPEN bit
set DECAPEN
DECAP bit
set DECAP
C(n)V
CH(n)F bit
clear CH(n)F
C(n+1)V
CH(n+1)F bit
clear CH(n+1)F
Note
- The commands set DECAPEN, set DECAP, clear CH(n)F, and clear CH(n+1)F are made by the user.
Figure 39-249. Dual Edge Capture – Continuous mode for positive polarity pulse width

39.5.24.4 Period measurement

If the channels (n) and (n+1) are configured to capture consecutive edges of the same
polarity, then the period of the channel (n) input signal is measured. If both channels (n)
and (n+1) are configured to capture rising edges (ELS(n)B:ELS(n)A = 0:1 and ELS(n
+1)B:ELS(n+1)A = 0:1), then the period between two consecutive rising edges is
measured. If both channels (n) and (n+1) are configured to capture falling edges
(ELS(n)B:ELS(n)A = 1:0 and ELS(n+1)B:ELS(n+1)A = 1:0), then the period between
two consecutive falling edges is measured.
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KV4x Reference Manual, Rev. 2, 02/2015
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Freescale Semiconductor, Inc.
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