Channel Trigger Output - NXP Semiconductors freescale KV4 Series Reference Manual

FTM counter
QUADEN
DECAPEN
COMBINE(m)
CPWMS
C(n)V
MS(n)B
MS(n)A
ELS(n)B
CH(n)OI
ELS(n)A
CH(n+1)OI
generation of
channel (n)
output signal
initialization
generation of
channel (n+1)
output signal
C(n+1)V
MS(n+1)B
MS(n+1)A
ELS(n+1)B
ELS(n+1)A
NOTE
The channels (n) and (n+1) are in output compare, EPWM, CPWM or combine modes.
Figure 39-239. Priority of the features used at the generation of channels (n) and (n+1)
The Initialization
Software output control

39.5.20 Channel trigger output

If CHjTRIG = 1, where j = 0, 1, 2, 3, 4, or 5, then the FTM generates a trigger when the
channel (j) match occurs (FTM counter = C(j)V).
The channel trigger output provides a trigger signal that is used for on-chip modules.
Freescale Semiconductor, Inc.
pair channels (m) - channels (n) and (n+1)
CH(n)OC
CH(n)OCV
CH(n+1)OC
CH(n+1)OCV
INV(m)EN
COMP(m)
software
complementary
inverting
output
mode
control
outputs signals
Note
feature must not be used with
features.
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Chapter 39 FlexTimer Module (FTM)
CH(n)OM
DTEN(m)
CH(n+1)OM FAULTEN(m)
deadtime
output
fault
insertion
mask
control
Inverting and
POL(n)
POL(n+1)
channel
(n)
output
signal
polarity
control
channel
(n+1)
output
signal
1001