Dac Data Buffer Interrupts; Modes Of Dac Data Buffer Operation - NXP Semiconductors freescale KV4 Series Reference Manual

Functional description
The data buffer can be configured to operate in Normal mode, Swing mode, One-Time
Scan mode or FIFO mode. When the buffer operation is switched from one mode to
another, the read pointer does not change. The read pointer can be set to any value
between 0 and C2[DACBFUP] by writing C2[DACBFRP].

36.6.1.1 DAC data buffer interrupts

There are several interrupts and associated flags that can be configured for the DAC
buffer. SR[DACBFRPBF] is set when the DAC buffer read pointer reaches the DAC
buffer upper limit, that is, C2[DACBFRP] = C2[DACBFUP]. SR[DACBFRPTF] is set
when the DAC read pointer is equal to the start position, 0. Finally, SR[DACBFWMF] is
set when the DAC buffer read pointer has reached the position defined by
C1[DACBFWM]. C1[DACBFWM] can be used to generate an interrupt when the DAC
buffer read pointer is between 1 to 4 words from C2[DACBFUP].

36.6.1.2 Modes of DAC data buffer operation

The following table describes the different modes of data buffer operation for the DAC
module.
Table 36-40. Modes of DAC data buffer operation
Modes
Buffer Normal mode
Buffer Swing mode
Buffer One-time Scan mode
FIFO Mode
762
This is the default mode. The buffer works as a circular buffer.
The read pointer increases by one, every time the trigger
occurs. When the read pointer reaches the upper limit, it goes
to 0 directly in the next trigger event.
This mode is similar to the normal mode. However, when the
read pointer reaches the upper limit, it does not go to 0. It will
descend by 1 in the next trigger events until 0 is reached.
The read pointer increases by 1 every time the trigger occurs.
When it reaches the upper limit, it stops there. If read pointer
is reset to the address other than the upper limit, it will
increase to the upper address and stop there again.
NOTE: If the software set the read pointer to the upper limit,
In FIFO mode, the buffer is organized as a FIFO. For a valid
write to any DACDATx, the data is put into the FIFO, and the
write pointer is automatically incremented. The module is
connected internally to a 32bit interface. For any 16bit or 8bit
FIFO access, address bit[1] needs to be 0; otherwise, the
write is ignored. For any 32bit FIFO access, the Write_Pointer
needs to be an EVEN number; otherwise, the write is ignored.
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
Description
the read pointer will not advance in this mode.
Freescale Semiconductor, Inc.