Counter Reset; When The Tof Bit Is Set - NXP Semiconductors freescale KV4 Series Reference Manual

Functional description
• FTMEN = 1
• QUADEN = 0
• CPWMS = 0
• CNTIN = 0x0000, and
• MOD = 0xFFFF

39.5.3.4 Counter reset

Any one of the following cases resets the FTM counter to the value in the CNTIN register
and the channels output to its initial value, except for channels in Output Compare mode.
• Any write to CNT.
• FTM counter synchronization.
• A channel in Input Capture mode with ICRST = 1
Capture Mode).

39.5.3.5 When the TOF bit is set

The NUMTOF[4:0] bits define the number of times that the FTM counter overflow
should occur before the TOF bit to be set. If NUMTOF[4:0] = 0x00, then the TOF bit is
set at each FTM counter overflow.
Initialize the FTM counter, by writing to CNT, after writing to the NUMTOF[4:0] bits to
avoid confusion about when the first counter overflow will occur.
FTM counter
NUMTOF[4:0]
TOF counter
0x01
set TOF bit
Figure 39-174. Periodic TOF when NUMTOF = 0x02
954
0x02
0x02 0x00 0x01
KV4x Reference Manual, Rev. 2, 02/2015
Preliminary
(FTM Counter Reset in Input
0x02 0x00 0x01
Freescale Semiconductor, Inc.
0x02