External Interrupts - Renesas H8 Series Hardware Manual

Section 3 Exception Handling
Wakeup Edge Select Register (WEGR)
Bit 7
WKEGS7
Initial value 0
Read/Write R/W
WEGR is an 8-bit read/write register that specifies rising or falling edge sensing for pins
WEGR is initialized to H'00 by a reset.
Bit n— W K P n Edge Select (WKEGSn)
Bit n selects n pin input sensing.
W K P
Bit n
WKEGSn Description
0 n pin falling edge detected
W K P
1 n pin rising edge detected
W K P
3.3.3

External Interrupts

There are 13 external interrupts: WKP7 to WKP0, IRQ4, IRQ3, IRQ1, IRQ0, and IRQAEC.
Interrupts WKP to WKP
7
Interrupts WKP7 to WKP0 are requested by either rising or falling edge input to pins
. When these pins are designated as pins
W K P
0
rising or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.
Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in
IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.
When WKP7 to WKP0 interrupt exception handling is initiated, the I bit is set to 1 in CCR.
Vector number 9 is assigned to interrupts WKP7 to WKP0. All eight interrupt sources have the
same vector number, so the interrupt-handling routine must discriminate the interrupt source.
Rev. 7.00 Mar 10, 2005 page 90 of 652
REJ09B0042-0700
6 5
WKEGS6 WKEGS5 WKEGS4
0 0
R/W R/W
0
W K P
4 3
WKEGS3 WKEGS2
0 0
R/W R/W R/W
to in port mode register 5 and a
W K P
7 0
2 1 0
WKEGS1 WKEGS0
0 0 0
R/W R/W
W K P
(initial value)
(n = 7 to 0)
W K P
7
n .
to