32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
10-bit Address Format
In order to prevent address clashes, due to the limited range of the 7-bit addresses, a new 10-bit
address scheme has been introduced. This enhancement can be mixed with the 7-bit addressing
mode which increases the available address range about ten times. For the 10-bit addressing mode,
the first two bytes after a START signal include a header byte and an address byte that usually
determines which slave will be selected by the master. The header byte is composed of a leading
"11110", the 10
slave device address.
S
1
Figure 142. 10-bit Addressing Write Transmit Mode
MSB
S
1
1
1
1
0
A9
A8
S = START condition
Sr = Repeated-START condition
W = Write command
R = Read command
Ack = Acknowledge
A9 ~ A0 = 10-bit Address
Figure 143. 10-bits Addressing Read Receive Mode
Rev. 1.00
th
and 9
th
bits of the slave address. The second byte is the remaining 8 bits of the
MSB
1
1
1
0
A9
A8
W
S = START condition
W = Write command
Ack = Acknowledge
A9 ~ A0 = 10-bit Address
W
Ack A7
A6
A5
A4
A3
A2
395 of 486
Ack A7
A6
A5
A4
A3
A2
LSB
A1
A0
Ack
Sr
1
1
1
1
LSB
A1
A0
Ack
Data
0
A9
A8
R
Ack
Data
July 31, 2018
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