Port B Output Reset Register - Pbrr; Port B Sink Current Enhanced Selection Register - Pbscer - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Port B Output Reset Register – PBRR
This register is used to reset the corresponding bit of the GPIO Port B output data.
Offset: 0x028
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset WO 0 WO
7
Type/Reset WO 0 WO
Bits Field
[15:0] PBRSTn
Port B Sink Current Enhanced Selection Register – PBSCER
This register specifies the GPIO Port B enhanced sink driving current.
Offset: 0x02C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
PBSCE15 PBSCE14 PBSCE13 PBSCE12 PBSCE11 PBSCE10
Type/Reset RW 0 RW
7
PBSCE7
Type/Reset RW 0 RW
Bits Field
[15:0] PBSCEn
Rev. 1.00
30 29 28
22 21 20
14 13 12
0 WO 0 WO
6 5
0 WO 0 WO
Descriptions
GPIO Port B pin n Output Reset Control Bits (n = 0 ~ 15)
0: No effect on the PBDOUTn bit
1: Reset the PBDOUTn bit
30 29 28
22 21 20
14 13 12
0 RW 0 RW
6 5
PBSCE6 PBSCE5 PBSCE4
0 RW 0 RW
Descriptions
GPIO Port B pin n Sink Current Enhanced Selection Control Bits (n = 0 ~ 15)
0: No enhanced sink current
1: Enhanced sink current
128 of 486
27 26
Reserved
19 18
Reserved
11 10
PBRST
0 WO 0 WO
4 3 2
PBRST
0 WO 0 WO
27 26
Reserved
19 18
Reserved
11 10
0 RW 0 RW
4 3 2
PBSCE3 PBSCE2
0 RW 0 RW
25 24
17 16
9 8
0 WO 0 WO 0
1 0
0 WO 0 WO 0
25 24
17 16
9 8
PBSCE9 PBSCE8
0 RW 0 RW 0
1 0
PBSCE1 PBSCE0
0 RW 0 RW 0
July 31, 2018