Holtek HT32F50231 User Manual page 20

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Figure 162. USART Block Diagram ...................................................................................................... 440
Figure 163. USART Serial Data Format ............................................................................................... 442
Figure 164. USART Clock CK_USART and Data Frame Timing .......................................................... 442
Figure 165. Hardware Flow Control between 2 USARTs ...................................................................... 443
Figure 166. USART RTS Flow Control ................................................................................................. 444
Figure 167. USART CTS Flow Control ................................................................................................. 444
Figure 168. IrDA Modulation and Demodulation ................................................................................... 445
Figure 169. USART I/O and IrDA Block Diagram ................................................................................. 446
Figure 170. RS485 Interface and Waveform ........................................................................................ 447
Figure 171. USART Synchronous Transmission Example ................................................................... 448
Figure 172. Figure 11. 8-bit Format USART Synchronous Waveform .................................................. 449
Figure 173. UART Block Diagram ......................................................................................................... 465
Figure 174. UART Serial Data Format .................................................................................................. 466
Figure 175. UART Clock CK_UART and Data Frame Timing ............................................................... 467
Figure 176. Divider Functional Diagram ............................................................................................... 476
Figure 177. CRC Block Diagram .......................................................................................................... 480
Figure 178. CRC Data Bit and Byte Reversal Example ........................................................................ 481
Rev. 1.00 20 of 486 July 31, 2018