Flash Operation Command Register - Ocmr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Flash Operation Command Register – OCMR
This register is used to specify the Flash operation commands that include word programming, page erase and
mass erase.
Offset: 0x00C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[3:0] CMD
Rev. 1.00
30 29 28
22 21 20
14 13 12
6 5 4
Reserved
Descriptions
Flash Operation Command
The following table shows definitions of CMD [3:0] bits which specify the Flash
operation. If an invalid command is set and the IOCMIEN bit is set to 1, an Invalid
Operation Command interrupt will occur.
CMD [3:0] Description
0x0 Idle (default)
0x4 Word programming
0x8 Page erase
0xA Mass erase
Others Reserved
47 of 486
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
CMD
RW 0 RW 0 RW
25 24
17 16
9 8
1 0
0 RW 0
July 31, 2018