Divider (Div); Introduction; Features; Functional Descriptions - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
23

Divider (DIV)

Introduction

In order to enhance the MCU performance, a divider is integrated in the devices. The divider can
implement the signed or unsigned 32-bit data division operation. An error flag will be generated
when the division by zero condition occurs.

Features

▄
Signed / unsigned 32-bit divider
▄
Calculate in 8 clock cycles and load in 1 clock cycle
▄
Division by zero error flag

Functional Descriptions

The division and modulus functions of the truncated division are related in the following way:
Where "A" is Dividend, "B" is Divisor, "Q" is Quotient and "R" is Remainder. The divider
requires a software trigger start signal to start a calculation by setting the "START" bit in the
Divider Control Register. The divider calculation complete flag will be set to 1 after 8 clock cycles,
however, if the divisor register data is zero during the calculation, the division by zero error flag
will be set to 1.
32-bit Divisor
32-bit Dividend
S/W Trigger

Figure 176. Divider Functional Diagram

Rev. 1.00
A / B = Q ... R
32-bit / 32-bit
Divider
476 of 486
32-bit Quotient
32-bit Remainder
Division by Zero Error Flag
Calculation Complete Flag
July 31, 2018