Apb Peripheral Clock Selection Register 1 - Apbpcsr1 - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
APB Peripheral Clock Selection Register 1 – APBPCSR1
This register specifies APB peripheral clock prescaler selection.
Offset: 0x03C
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
VDDRPCLK
Type/Reset RW 0 RW
7
Reserved
Type/Reset
Bits Field
[15:14] VDDRCLK
[13:12] WDTRPCLK
[5:4] ADCCPCLK
[3:2] EXTIPCLK
[1:0] AFIOPCLK
Rev. 1.00
30 29 28
22 21 20
14 13 12
WDTRPCLK
0 RW 0 RW
6 5 4
ADCCPCLK
RW 0 RW
Descriptions
V Domain Register Access Clock Selection
DD
00: PCLK = CK_AHB / 4
01: PCLK = CK_AHB / 8
10: PCLK = CK_AHB / 16
11: PCLK = CK_AHB / 32
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
WDT Register Access Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
ADC Controller Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
EXTI Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
AFIO Peripheral Clock Selection
00: PCLK = CK_AHB
01: PCLK = CK_AHB / 2
10: PCLK = CK_AHB / 4
11: PCLK = CK_AHB / 8
PCLK = Peripheral Clock; CK_AHB = AHB and CPU clock
92 of 486
27 26
Reserved
19 18
Reserved
11 10
0
3 2
EXTIPCLK
0 RW 0 RW 0 RW
25 24
17 16
9 8
Reserved
1 0
AFIOPCLK
0 RW 0
July 31, 2018