Channel Control Register - Chctr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Channel Control Register – CHCTR
This register contains the channel capture input or compare output function enable control bits.
Offset: 0x050
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Reserved
Type/Reset RW
Bits Field
[6] CH3E
[5] CH2NE
[4] CH2E
Rev. 1.00
30 29 28
22 21 20
14 13 12
6 5 4
CH3E CH2NE CH2E
0 RW 0 RW
Descriptions
Channel 3 Capture/Compare Enable
- Channel 3 is configured as an input (CH3CCS = 0x1 / 0x2 / 0x3)
0: Input Capture Mode is disabled
1: Input Capture Mode is enabled
- Channel 3 is configured as an output (CH3CCS = 0x0)
0: Off – Channel 3 output signal CH3O is not active
1: On – Channel 3 output signal CH3O is generated on the corresponding output
pin depending on the condition of the CHMOE, CHOSSI, CHOSSR and
CH3OIS bits.
Channel 2 Capture/Compare Complementary Enable
0: Off – Channel 2 complementary output CH2NO is not active. The CH2NO level
is then determined by the CHMOE, CHOSSI, CHOSSR, CH2OIS, CH2OISN
and CH2E bits.
1: On – Channel 2 complementary output CH2NO is generated on the
corresponding output pin depending on the condition of the CHMOE, CHOSSI,
CHOSSR, CH2OIS, CH2OISN and CH2E bits.
Channel 2 Capture/Compare Enable
- Channel 2 is configured as an input (CH2CCS = 0x1 / 0x2 / 0x3)
0: Input Capture Mode is disabled
1: Input Capture Mode is enabled
- Channel 2 is configured as an output (CH2CCS = 0x0)
0: Off – Channel 2 output signal CH2O is not active. The CH2O level is then
determined by the condition of the CHMOE, CHOSSI, CHOSSR, CH2OIS,
CH2OISN and CH2NE bits.
1: On – Channel 2 output signal CH2O is generated on the corresponding output
pin determined by the condition of the CHMOE, CHOSSI, CHOSSR, CH2OIS,
CH2OISN and CH2NE bits.
353 of 486
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
CH1NE CH1E
0 RW 0 RW 0 RW
25 24
17 16
9 8
1 0
CH0NE CH0E
0 RW 0
July 31, 2018