32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
9
Alternate Function Input / Output Control
Unit (AFIO)
Introduction
In order to expand the flexibility of the GPIO or the usage of peripheral functions, each I/O pin can
be configured to have up to sixteen different functions such as GPIO or IP functions by setting the
GPxCFGLR or GPxCFGHR register where x is the different port name. According to the usage of
the IP resource and application requirements, suitable pin-out locations can be selected by using
the peripheral I/O remapping mechanism. Additionally, various GPIO pins can be selected to be
the EXTI interrupt line by setting the EXTInPIN [3:0] field in the ESSRn register to trigger an
interrupt or event. Please refer to the EXTI section for more details.
APB Interface
Peripheral IP I / O
Alternate Function Output through GPIO
APB Interface
Alternate Function Input through GPIO
Figure 21. AFIO Block Diagram
Rev. 1.00
AFIO control
signal
AFIO Configuration
Registers
Lock Signal
AFIO output
signal
Alternative Function
Output Selections
AFIO control
signal
AFIO Configuration
Registers
Lock Signal
AFIO Input
signal
Peripheral IPm Input
Peripheral IPn Input
AFIO Input
signal
139 of 486
PxLOCKR
GPIOx
GPIO Module
PxLOCKR
GPIOx
GPIO Module
July 31, 2018
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