32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
Features
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16-bit up/down auto-reload counter
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16-bit programmable prescaler that allows division the counter clock frequency by any factor
between 1 and 65536
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Up to 4 independent channels for:
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Input Capture function
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Compare Match Output
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PWM waveform Generation – Edge and Center-aligned Counting Mode
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Single Pulse Mode Output
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Complementary Outputs with programmable dead-time insertion
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Repetition counter updates timer registers only after a given number of counter cycles.
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Synchronization circuit controls the timer with external signals and can interconnect several
timers together.
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Interrupt generation on the following events:
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Update event 1
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Update event 2
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Trigger event
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Input capture event
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Output compare match
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Break event – only interrupt
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MCTM Master/Slave mode controller
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Supports 3-phase motor control and hall sensor interface
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Break input signals to assert the timer output signals in reset state or in a known state
Functional Descriptions
Counter Mode
Up-Counting
In this mode the counter counts continuously from 0 to the counter-reload value, which is defined
in the CRR register, in a count-up direction. Once the counter reaches the counter-reload value,
the Timer Module generates an overflow event and the counter restarts to count once again from
0. This action will continue repeatedly. The counting direction bit DIR in the CNTCFR register
should be set to 0 for the up-counting mode.
When an update event 1 is generated by setting the UEV1G bit in the EVGR register to 1, the
counter value will also be initialised to 0.
Rev. 1.00
299 of 486
July 31, 2018
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