32-Bit Arm
®
Cortex
®
-M0+ MCU
HT32F50231/HT32F50241
The accompanying diagram shows that the complementary output states when a break event occurs
where the complementary outputs are enabled by setting both the CHxE and CHxNE bits to 1.
CHMOE
CHxOREF
CHxO
CHxNO
CHxO
CHxNO
Figure 122. Channel 0 ~ 2 Complementary Outputs with a Break Event Occurrence
Rev. 1.00
CHxP = 0, CHxOIS = 0
CHxNP = 0, CHxOISN = 1
Dead-time
CHxP = 0, CHxOIS = 1
CHxNP = 1, CHxOIS = 1
Dead-time
318 of 486
Break event
Dead-time
Dead-time
Dead-time
Dead-time
July 31, 2018
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