Channel 2 Input Configuration Register - Ch2Icfr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Channel 2 Input Configuration Register – CH2ICFR
This register specifies the channel 2 input mode configuration.
Offset: 0x028
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[19:18] CH2PSC
[17:16] CH2CCS
Rev. 1.00
30 29 28
22 21 20
Reserved
14 13 12
6 5 4
Reserved
Descriptions
Channel 2 Capture Input Source Prescaler Setting
These bits define the effective events of the channel 2 capture input. Note that the
prescaler is reset once the Channel 2 Capture / Compare Enable bit, CH2E, in the
Channel Control register named CHCTR is cleared to 0.
00: No prescaler, channel 2 capture input signal is chosen for each active event
01: Channel 2 Capture input signal is chosen for every 2 events
10: Channel 2 Capture input signal is chosen for every 4 events
11: Channel 2 Capture input signal is chosen for every 8 events
Channel 2 Capture / Compare Selection
00: Channel 2 is configured as an output
01: Channel 2 is configured as an input derived from the TI2 signal
10: Channel 2 is configured as an input derived from the TI3 signal
11: Channel 2 is configured as an input which comes from the TRCED signal
derived from the Trigger Controller
Note: The CH2CCS field can be accessed only when the CH2E bit is cleared to 0.
222 of 486
27 26
Reserved
19 18
CH2PSC
RW 0 RW 0 RW
11 10
Reserved
3 2
RW 0 RW 0 RW
25 24
17 16
CH2CCS
0 RW 0
9 8
1 0
TI2F
0 RW 0
July 31, 2018