Figure 62. Trigger Gptm And Mctm With The Gptm Ch0 Input - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Starting Two Timers Synchronously in Response to an External Trigger
▄
Configure GPTM to operate in the master mode to send its enable signal as a trigger output
(MMSEL = 0x1).
▄
Configure GPTM slave mode to receive its input trigger source from GT_CH0 pin (TRSEL = 0x1).
▄
Configure GPTM to be in the slave trigger mode (SMSEL = 0x6).
▄
Enable the GPTM master timer synchronization function by setting the TSE bit in the MDCFR
register to 1 to synchronize the slave timer.
▄
Configure MCTM to receive its input trigger source from the GPTM trigger output (TRSEL = 0xA).
▄
Configure MCTM to be in the slave trigger mode (SMSEL = 0x6).
Master GPTM
GPTM (TME bit)
GPTM (TEVIF)
GPTM CK_PSC
Slave MCTM
MCTM (TME bit)
MCTM (TEVIF)
MCTM CK_PSC

Figure 62. Trigger GPTM and MCTM with the GPTM CH0 Input

Rev. 1.00
f =f
DTS CLKIN
TI0
TI0FP
TI0S0ED
34
GPTM CNTR
Write UEVG bit
MCTM CNTR
11
211 of 486
TSE=1
Delay
0 1 2
ITI
0 1 2
0
Write UEV1G bit
3 4 5
3 4
5
July 31, 2018