Register Map; Register Descriptions; Divider Control Register - Cr; Table 56. Div Register Map - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241

Register Map

The following table shows the DIV registers and reset values.

Table 56. DIV Register Map

Register
CR 0x000
DDR 0x004
DSR 0x008
QTR 0x00C
RMR 0x010

Register Descriptions

Divider Control Register – CR
This register contains the divider trigger control bit and the calculation status.
Offset: 0x000
Reset value: 0x0000_0008
31
Type/Reset
23
Type/Reset
15
Type/Reset
7
Type/Reset
Bits Field
[3] COM
[2] ZEF
[0] START
Rev. 1.00
Offset
Divider Control Register
Dividend Data Register
Divisor Data Register
Quotient Data Register
Remainder Data Register
30 29 28
22 21 20
14 13 12
6 5 4
Reserved
Descriptions
Calculation Complete Flag
0: Data is invalid
1: New data is valid
If this bit is set to 1, it indicates that the divider calculation is completed and data is
valid. This bit is cleared to 0 by hardware after a calculation is initiated.
Division by Zero Error Flag
0: Divisor is not zero
1: Divisor is zero
This bit will be cleared to 0 by hardware after a calculation is initiated.
Divider calculation start trigger control bit
0: No action
1: Trigger divider to start calculation
When this bit is set high, the divider will start a calculation.
477 of 486
Description
27 26
Reserved
19 18
Reserved
11 10
Reserved
3 2
COM ZEF
RO 1 RO 0
Reset Value
0x0000_0008
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
25 24
17 16
9 8
1 0
Reserved START
RW 0
July 31, 2018