I 2 C Timeout Function; Register Map; Table 44. I 2 C Register Map - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
I 2 C Timeout Function
In order to reduce the occurrence of I
source, a timeout function is provided. If the I
timeout period, then a corresponding I
determined by a 16-bit down-counting counter with a programmable preload value. The timeout
counter is driven by the I
in the I2CTOUT register. The TOUT field in the I2CTOUT register is used to define the timeout
counter preload value. The timeout function is enabled by setting the ENTOUT bit in the I2CCR
register. The timeout counter will start to count down from the preloaded value if the ENTOUT bit
is set to 1 and one of the following conditions occurs:
▄
The I C master module sends a START signal.
2
▄
The I 2 C slave module detects a START signal.
▄
The RXBF, TXDE, RXDNE, RXNACK, GCS or ADRS flags is asserted.
The timeout counter will stop counting when the ENTOUT bit is cleared. However, the counter
will also stop counting when one of the conditions, listed as follows, occurs:
▄
The I 2 C slave module is not addressed.
▄
The I 2 C slave module detects a STOP signal.
▄
The I 2 C master module sends a STOP signal.
▄
The ARBLOS or BUSERR flag in the I2CSR register are asserted.
If the timeout counter underflows, the corresponding timeout flag, TOUTF, in the I2CSR register
will be set to 1 and a timeout interrupt will be generated if the relevant interrupt is enabled.

Register Map

The following table shows the I
Table 44. I 2 C Register Map
Register
I2CCR
I2CIER
I2CADDR
I2CSR
I2CSHPGR
I2CSLPGR
I2CDR
I2CTAR
I2CADDMR
I2CADDSR
I2CTOUT
Rev. 1.00
2 C lockup problem due to the reception of erroneous clock
2 C timeout flag will be asserted. This timeout period is
2 C timeout clock, f
2 C registers and reset values.
Offset
0x000 I 2 C Control Register
0x004 I 2 C Interrupt Enable Register
0x008 I 2 C Address Register
0x00C I 2 C Status Register
0x010 I 2 C SCL High Period Generation Register
0x014 I 2 C SCL Low Period Generation Register
0x018 I 2 C Data Register
0x01C I 2 C Target Register
0x020 I 2 C Address Mask Register
0x024 I 2 C Address Snoop Register
0x028 I 2 C Timeout Register
405 of 486
2 C bus clock source is not received for a certain
, which is specified by the timeout prescaler field
I2CTO
Description Reset Value
0x0000_2000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
July 31, 2018