Holtek HT32F50231 User Manual page 358

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Bits Field
[17:16] LOCKLV
[11:8] BKF
[5] CHAOE
[4] CHMOE
[1] BKP
[0] BKE
Rev. 1.00
Descriptions
Lock Level Setting
These bits offer write protection against software errors. The bits can be written only
once after a reset.
00: LOCK OFF, Register write protected function is disabled
01: LOCK Level 1
10: LOCK Level 2
11: LOCK Level 3
Break Input Filter Setting
These bits define the frequency ratio used to sample the MT_BRK signal. The digital
filter in the MCTM is an N-event counter where N is defined as how many valid
transitions are necessary to output a filtered signal.
0000: No filter – do not need sample clock
0001: f = f , N = 2
SAMPLING CLKIN
0010: f = f , N = 4
SAMPLING CLKIN
0011: f = f , N = 8
SAMPLING CLKIN
0100: f = f / 2, N = 6
SAMPLING DTS
0101: f = f / 2, N = 8
SAMPLING DTS
0110: f = f / 4, N = 6
SAMPLING DTS
0111: f = f / 4, N = 8
SAMPLING DTS
1000: f = f / 8, N = 6
SAMPLING DTS
1001: f = f / 8, N = 8
SAMPLING DTS
1010: f = f / 16, N = 5
SAMPLING DTS
1011: f = f / 16, N = 6
SAMPLING DTS
1100: f = f / 16, N = 8
SAMPLING DTS
1101: f = f / 32, N = 5
SAMPLING DTS
1110: f = f / 32, N = 6
SAMPLING DTS
1111: f = f / 32, N = 8
SAMPLING DTS
Channel Automatic Output Enable
0: CHMOE can be set only by software
1: CHMOE can be set by software or automatically by an update event 1
Channel Main Output Enable
Cleared asynchronously by hardware on a break event occurrence.
0: MT_CHxO and MT_CHxNO are disabled or forced to idle states
1: MT_CHxO and MT_CHxNO are enabled if the enable bits (CHxE, CHxNE) are
set
Break Input Polarity.
0: Break input is active low
1: Break input is active high
Break Enable
0: Break inputs is disabled
1: Break inputs is enabled
358 of 486 July 31, 2018