Usart Timing Parameter Register - Usrtpr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
USART Timing Parameter Register – USRTPR
This register contains the USART timing parameters including the transmitter time guard parameters and the
receive FIFO time-out value together with the RX FIFO time-out function enable control.
Offset: 0x014
Reset value: 0x0000_0000
31
Type/Reset
23
Type/Reset
15
Type/Reset RW 0 RW
7
RXTOEN
Type/Reset RW 0 RW
Bits Field
[15:8] TG
[7] RXTOEN
[6:0] RXTOC
Rev. 1.00
30 29 28
22 21 20
14 13 12
0 RW 0 RW
6 5 4
0 RW 0 RW
Descriptions
Transmitter Time Guard
The transmitter time guard counter is driven by the baud rate clock. When the TX
FIFO transmits data, the counter will be reset and then starts to count after a word
transmission has completed. Only when the counter content is equal to the TG
value, are further word transmission transactions allowed.
Receive FIFO Time-Out Counter Enable
0: Receive FIFO Time-Out Counter is disabled
1: Receive FIFO Time-Out Counter is enabled
Receive FIFO Time-Out Counter Compare Value
The RX FIFO time-out counter is driven by the baud rate clock. When the RX FIFO
receives new data, the counter will be reset and then starts to count. Once the
time-out counter content is equal to the time-out counter compare value RXTOC, a
receive FIFO time-out interrupt, RXTOI, will be generated if the RXTOIE bit in the
USRIER register is set to 1. New received data or the empty RX FIFO after being
read will clear the RX FIFO time-out counter.
459 of 486
27 26
Reserved
19 18
Reserved
11 10
TG
0 RW 0 RW 0 RW
3 2
RXTOC
0 RW 0 RW 0 RW
25 24
17 16
9 8
0 RW 0
1 0
0 RW 0
July 31, 2018