Port A Output Set / Reset Control Register - Pasrr - Holtek HT32F50231 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F50231/HT32F50241
Port A Output Set / Reset Control Register – PASRR
This register is used to set or reset the corresponding bit of the GPIO Port A output data.
Offset: 0x024
Reset value: 0x0000_0000
31
Type/Reset WO 0 WO
23
Type/Reset WO 0 WO
15
Type/Reset WO 0 WO
7
Type/Reset WO 0 WO
Bits Field
[31:16] PARSTn
[15:0] PASETn
Rev. 1.00
30 29 28
0 WO 0 WO
22 21 20
0 WO 0 WO
14 13 12
0 WO 0 WO
6 5 4
0 WO 0 WO
Descriptions
GPIO Port A pin n Output Reset Control Bits (n = 0 ~ 15)
0: No effect on the PADOUTn bit
1: Reset the PADOUTn bit
Note that when the PARSTn bit in this register or (and) the PARSTn bit in the PARR
register is enabled, the reset function on the PADOUTn bit will take effect.
GPIO Port A pin n Output Set Control Bits (n = 0 ~ 15)
0: No effect on the PADOUTn bit
1: Set the PADOUTn bit
Note that the function enabled by the PASETn bit has the higher priority if both the
PASETn and PARSTn bits are set at the same time.
117 of 486
27 26
PARST
0 WO 0 WO 0 WO
19 18
PARST
0 WO 0 WO 0 WO
11 10
PASET
0 WO 0 WO 0 WO
3 2
PASET
0 WO 0 WO 0 WO
25 24
0 WO 0
17 16
0 WO 0
9 8
0 WO 0
1 0
0 WO 0
July 31, 2018