Holtek HT32F50241 microcontroller Manuals

Manuals and User Guides for Holtek HT32F50241 microcontroller. We have 1 Holtek HT32F50241 microcontroller manual available for free PDF download: User Manual

Holtek HT32F50241 User Manual (486 pages)

32-Bit Microcontroller with Arm Cortex-M0+

Brand: Holtek | Category: Microcontrollers | Size: 5 MB

Table of Contents
2
1 Introduction

21
- Overview
  21
- Features
  22
- Device Information
  25
- Table 1. Features and Peripheral List
  25
- Block Diagram
  26
- Figure 1. Block Diagram
  26
2 Document Conventions

27
- Table 2. Document Conventions
  27
3 System Architecture

28
- Arm ® Cortex ® -M0+ Processor
  28
- Bus Architecture
  29
- Figure 2. Cortex ® -M0+ Block Diagram
  29
- Memory Organization
  30
  - Figure 3. Bus Architecture
    30
  - Figure 4. Memory Map
    31
  - Memory Map
    31
  - Table 3. Register Map
    32
  - AHB Peripherals
    33
  - APB Peripherals
    33
  - Embedded Flash Memory
    33
  - Embedded SRAM Memory
    33
4 Flash Memory Controller (FMC)

34
5 Power Control Unit (PWRCU)

60
6 Clock Control Unit (CKCU)

70
7 Reset Control Unit (RSTCU)

98
- Introduction
  98
- Figure 17. RSTCU Block Diagram
  98
- Functional Descriptions
  99
  - Power on Reset
    99
  - System Reset
    99
  - AHB and APB Unit Reset
    99
  - Figure 18. Power on Reset Sequence
    99
- Register Map
  100
- Register Descriptions
  100
8 General Purpose I/O (GPIO)

105
9 Alternate Function Input / Output Control Unit (AFIO)

139
- Introduction
  139
- Figure 21. AFIO Block Diagram
  139
- Features
  140
- Functional Descriptions
  140
  - External Interrupt Pin Selection
    140
  - Figure 22. EXTI Channel Input Selection
    140
  - Alternate Function
    141
  - Lock Mechanism
    141
- Register Map
  141
- Table 19. AFIO Selection for Peripheral Map Example
  141
- Table 20. AFIO Register Map
  141
- Register Descriptions
  142
10 Nested Vectored Interrupt Controller (NVIC)

146
- Introduction
  146
- Table 21. Exception Types
  146
- Features
  147
- Function Descriptions
  148
  - Systick Calibration
    148
- Register Map
  148
- Table 22. NVIC Register Map
  148
11 External Interrupt / Event Controller (EXTI)

149
12 Analog to Digital Converter (ADC)

161
- Introduction
  161
- Figure 26. ADC Block Diagram
  161
- Features
  162
- Function Descriptions
  163
  - ADC Clock Setup
    163
  - Channel Selection
    163
  - Conversion Mode
    163
  - Figure 27. One Shot Conversion Mode
    164
  - Figure 28. Continuous Conversion Mode
    164
  - Start Conversion on External Event
    166
  - Figure 29. Discontinuous Conversion Mode
    166
  - Sampling Time Setting
    167
  - Data Format
    167
  - Analog Watchdog
    167
  - Table 24. Data Format in ADCDR [15:0]
    167
  - Interrupts
    168
- Register Map
  169
- Table 25. A/D Converter Register Map
  169
- Register Descriptions
  170
13 General-Purpose Timer (GPTM)

185
14 Pulse Width Modulator (PWM)

247
15 Basic Function Timer (BFTM)

292
- Introduction
  292
- Features
  292
- Figure 89. BFTM Block Diagram
  292
- Functional Description
  293
  - Repetitive Mode
    293
  - Figure 90. BFTM - Repetitive Mode
    293
  - One Shot Mode
    294
  - Trigger ADC Start
    294
  - Figure 91. BFTM - One Shot Mode
    294
  - Figure 92. BFTM - One Shot Mode Counter Updating
    294
- Register Map
  295
- Register Descriptions
  295
16 Motor Control Timer (MCTM)

298
17 Real Time Clock (RTC)

373
- Introduction
  373
- Features
  373
- Figure 135. RTC Block Diagram
  373
- Functional Descriptions
  374
- Register Map
  376
- Register Descriptions
  376
  - RTC Counter Register - RTCCNT
    376
  - Table 41. RTC Register Map
    376
  - RTC Compare Register - RTCCMP
    377
  - RTC Control Register - RTCCR
    378
  - RTC Status Register - RTCSR
    380
  - RTC Interrupt and Wakeup Enable Register - RTCIWEN
    381
18 Watchdog Timer (WDT)

382
- Introduction
  382
- Features
  382
- Figure 136. Watchdog Timer Block Diagram
  382
- Functional Description
  383
- Figure 137. Watchdog Timer Behavior
  384
- Register Map
  385
- Register Descriptions
  385
19 Inter-Integrated Circuit

391
- 391
  391
- Introduction
  391
- Figure 138. I C Module Block Diagram
  391
- Features
  392
- Functional Descriptions
  392
  - Two-Wire Serial Interface
    392
  - START and STOP Conditions
    392
  - Data Validity
    393
  - Figure 139. START and STOP Condition
    393
  - Figure 140. Data Validity
    393
  - Addressing Format
    394
  - Figure 141. 7-Bit Addressing Mode
    394
  - Figure 142. 10-Bit Addressing Write Transmit Mode
    395
  - Figure 143. 10-Bits Addressing Read Receive Mode
    395
  - Data Transfer and Acknowledge
    396
  - Figure 144. I C Bus Acknowledge
    396
  - Clock Synchronization
    397
  - Arbitration
    397
  - Figure 145. Clock Synchronization During Arbitration
    397
  - Figure 146. Two Master Arbitration Procedure
    397
  - General Call Addressing
    398
  - Bus Error
    398
  - Address Mask Enable
    398
  - Address Snoop
    398
  - Operation Mode
    398
  - Figure 147. Master Transmitter Timing Diagram
    399
  - Figure 148. Master Receiver Timing Diagram
    401
  - Figure 149. Slave Transmitter Timing Diagram
    402
  - Figure 150. Slave Receiver Timing Diagram
    403
  - Conditions of Holding SCL Line
    404
  - Table 43. Conditions of Holding SCL Line
    404
  - I 2 C Timeout Function
    405
- Register Map
  405
- Table 44. I 2 C Register Map
  405
- Register Descriptions
  406
20 Serial Peripheral Interface (SPI)

420
21 Universal Synchronous Asynchronous Receiver Transmitter (USART)

440
- Introduction
  440
- Figure 162. USART Block Diagram
  440
- Features
  441
- Functional Descriptions
  441
- Register Map
  450
- Table 52. USART Register Map
  450
- Register Descriptions
  451
22 Universal Asynchronous Receiver Transmitter (UART)

465
- Introduction
  465
- Figure 173. UART Block Diagram
  465
- Features
  466
- Function Descriptions
  466
- Register Map
  468
- Table 54. Baud Rate Deviation Error Calculation - CK_UART = 10 Mhz
  468
- Table 55. UART Register Map
  468
- Register Descriptions
  469
23 Divider (DIV)

476
- Introduction
  476
- Features
  476
- Functional Descriptions
  476
- Figure 176. Divider Functional Diagram
  476
- Register Map
  477
- Register Descriptions
  477
  - Divider Control Register - CR
    477
  - Table 56. DIV Register Map
    477
  - Dividend Data Register - DDR
    478
  - Divisor Data Register - DSR
    478
  - Quotient Data Register - QTR
    479
  - Remainder Data Register - RMR
    479
24 Cyclic Redundancy Check (CRC)

480
- Introduction
  480
- Features
  480
- Figure 177. CRC Block Diagram
  480
- Functional Descriptions
  481
- Register Map
  482
- Register Descriptions
  482
  - CRC Control Register - CRCCR
    482
  - Table 57. CRC Register Map
    482
  - CRC Seed Register - CRCSDR
    483
  - CRC Checksum Register - CRCCSR
    484
  - CRC Data Register - CRCDR
    485

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Holtek HT32F50241 microcontroller Manuals

Holtek HT32F50241 User Manual (486 pages)

Table of Contents

1 Introduction

2 Document Conventions

3 System Architecture

4 Flash Memory Controller (FMC)

5 Power Control Unit (PWRCU)

6 Clock Control Unit (CKCU)

7 Reset Control Unit (RSTCU)

8 General Purpose I/O (GPIO)

9 Alternate Function Input / Output Control Unit (AFIO)

10 Nested Vectored Interrupt Controller (NVIC)

11 External Interrupt / Event Controller (EXTI)

12 Analog to Digital Converter (ADC)

13 General-Purpose Timer (GPTM)

14 Pulse Width Modulator (PWM)

15 Basic Function Timer (BFTM)

16 Motor Control Timer (MCTM)

17 Real Time Clock (RTC)

18 Watchdog Timer (WDT)

19 Inter-Integrated Circuit

20 Serial Peripheral Interface (SPI)

21 Universal Synchronous Asynchronous Receiver Transmitter (USART)

22 Universal Asynchronous Receiver Transmitter (UART)

23 Divider (DIV)

24 Cyclic Redundancy Check (CRC)

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